Title :
High performance low power low voltage adder
Author :
Wu, Aimin ; Ng, C.K.
Author_Institution :
Dept. of Electron. Eng., City Univ. of Hong Kong, Kowloon
fDate :
4/10/1997 12:00:00 AM
Abstract :
A high performance adder has been designed for low power, low voltage applications. The proposed circuit has a better performance in terms of power consumption and area efficiency. To justify claims, simulation results of various high speed adders are compared. The proposed adder is comparably fast compared to the other adders
Keywords :
CMOS logic circuits; adders; digital simulation; logic design; performance evaluation; CMOS digital IC; VLSI; area efficiency; digital signal processing; high speed adders; low power low voltage adder; low voltage applications; power consumption; simulation;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19970464
