Title :
Exhaustive testing of stuck-open faults in CMOS combinational circuits
Author :
Bate, J.A. ; Miller, D.M.
Author_Institution :
Dept. of Comput. Sci., Victoria Univ., BC, Canada
fDate :
1/1/1988 12:00:00 AM
Abstract :
CMOS circuits present some unique testing problems. Certain physical failures are not adequately represented by the traditional stuck-at fault model. Opens in transistors or their connections, a ´stuck-open´ fault, can require a sequence of tests. A number of test schemes employing exhaustive or pseudo-exhaustive input sequences have appeared in the literature. The authors examine the applicability of such a method to the testing of stuck-open faults in CMOS combinational circuits. It is shown that without careful planning an exhaustive test may not detect all stuck-open faults. A universal input sequence which will detect all stuck-open faults is proposed. This sequence corresponds to the Eulerian cycle in a directed hypercube. A circuit which generates such a sequence is outlined.
Keywords :
CMOS integrated circuits; combinatorial circuits; fault location; integrated circuit testing; CMOS combinational circuits; Eulerian cycle; directed hypercube; exhaustive input sequences; pseudoexhaustive input sequences; stuck-open faults;
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E