A parallel decoder for low latency decoding of turbo product codes

Author

Argon, Cenk ; McLaughlin, Steven W.

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

Volume

6

Issue

2

fYear

2002

Firstpage

70

Lastpage

72

Abstract

There has been intensive focus on turbo product codes (TPCs) which have low decoding complexity and achieve near-optimum performances at low signal-to-noise ratios. Different than the original TPC decoder, which performs row and column decoding in a serial fashion, we propose a parallel decoder structure. Simulation results show that with this approach, decoding latency of TPCs can be halved while maintaining virtually the same performance level.

Keywords

BCH codes; binary codes; block codes; delays; iterative decoding; linear codes; turbo codes; SISO decoding; SNR; binary BCH constituent codes; error correcting codes; iterative decoding; iterative soft-input soft-output decoding; linear block codes; low decoding complexity; low latency decoding; low signal-to-noise ratio; near-optimum performance; parallel decoder; random interleavers; simulation results; turbo product codes; Additive white noise; Argon; Block codes; Convolutional codes; Delay; Iterative algorithms; Iterative decoding; Product codes; Signal to noise ratio; Testing;

fLanguage

English

Journal_Title

Communications Letters, IEEE

Publisher

ieee

ISSN

1089-7798

Type

jour

DOI

10.1109/4234.984698

Filename

984698