• DocumentCode
    1253523
  • Title

    Chip for wideband digital predistortion RF power amplifier linearisation

  • Author

    Andreani, Pietro ; Sundstrom, Lars

  • Author_Institution
    Dept. of Appl. Electron., Lund Univ.
  • Volume
    33
  • Issue
    11
  • fYear
    1997
  • fDate
    5/22/1997 12:00:00 AM
  • Firstpage
    925
  • Lastpage
    926
  • Abstract
    The authors present a custom chip for use in digital predistortion linearisation of RF power amplifiers. The chip is mainly implemented with systolic arrays. At maximum clock-rate, 130 MHz, the throughput is 16 Msamples/s with a 5 V supply voltage and power consumption of 1 W. A throughput of 2 Msamples/s is achieved at a 1.2 V supply voltage with 6 mW power consumption
  • Keywords
    power amplifiers; 1.2 to 5 V; 130 MHz; 6 mW to 1 W; ASDSP; RF power amplifier; custom chip; systolic array; wideband digital predistortion linearisation;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19970660
  • Filename
    591527
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1253523