Title :
Thermal characterization of chip packages-evolutionary development of compact models
Author :
Bar-Cohen, Avram ; Krueger, William B.
Author_Institution :
Dept. of Mech. Eng., Minnesota Univ., Minneapolis, MN, USA
fDate :
12/1/1997 12:00:00 AM
Abstract :
The expanded Rjc methodology, first proposed in 1989, makes it possible to extend the use of this common figure-of-merit to chip packages with nonisothermal cases. This proposal spurred considerable debate and contributed to renewed efforts to provide “compact” thermal models of single chip packages, for preliminary design, as well as for detailed numerical simulation of populated printed circuit boards. This presentation offers a review of the development of this modified Rjc methodology and its efficacy in replicating the chip, or junction, temperature predicted by detailed numerical simulation
Keywords :
integrated circuit modelling; integrated circuit packaging; integrated circuit reliability; thermal resistance; chip packages; compact thermal models; figure-of-merit; junction temperature; nonisothermal cases; populated printed circuit boards; Electronic packaging thermal management; Integrated circuit packaging; Manufacturing; Numerical simulation; Printed circuits; Proposals; Surface resistance; Temperature; Thermal expansion; Thermal resistance;
Journal_Title :
Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on
