DocumentCode :
1254069
Title :
Hierarchical modeling of the VLSI design process
Author :
Hekmatpour, Amir ; Orailoglu, Alex ; Chau, Paul
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., San Diego, CA, USA
Volume :
6
Issue :
2
fYear :
1991
fDate :
4/1/1991 12:00:00 AM
Firstpage :
56
Lastpage :
70
Abstract :
A description is given of the Kinden environment, which combines object-oriented modeling and model-based reasoning to capture, integrate, and manage VLSI design process attributes and hierarchies. Related work is briefly reviewed, and the modeling of the design process is discussed, focusing on the Kinden approach. The model-based reasoning on which Kinden´s knowledge-processing architecture is based is described. The present implementation of Kinden is examined.<>
Keywords :
VLSI; circuit CAD; expert systems; object-oriented programming; Kinden environment; VLSI design process; attributes; hierarchical modeling; hierarchies; knowledge-processing architecture; model-based reasoning; object-oriented modeling; Algorithm design and analysis; Circuit testing; Design automation; Integrated circuit technology; Knowledge management; Object oriented databases; Object oriented modeling; Process design; Product design; Very large scale integration;
fLanguage :
English
Journal_Title :
IEEE Expert
Publisher :
ieee
ISSN :
0885-9000
Type :
jour
DOI :
10.1109/64.79710
Filename :
79710
Link To Document :
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