• DocumentCode
    1255151
  • Title

    FPGA-based parallel ASIP architecture for reactive systems

  • Author

    Buchenrieder, Klaus ; Kress, Rainer ; Sedlmeier, A. ; Veith, Christian

  • Author_Institution
    Siemens AG, Munich
  • Volume
    33
  • Issue
    10
  • fYear
    1997
  • fDate
    5/8/1997 12:00:00 AM
  • Firstpage
    842
  • Lastpage
    843
  • Abstract
    A scalable parallel ASIP architecture based on FPGAs suitable For the implementation of reactive systems is described. The specification language used is extended statecharts. An industrial example requiring the real-time control of several stepper motors illustrates the benefits of the approach
  • Keywords
    field programmable gate arrays; industrial control; parallel architectures; real-time systems; FPGA-based parallel architecture; application-specific integrated processors; extended statecharts; industrial stepper motor controller; parallel ASIP architecture; reactive systems; real-time control; scalable architecture; specification language;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19970555
  • Filename
    592583
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1255151