Title :
A high-speed silicon single-electron random access memory
Author :
Stone, N.J. ; Ahmed, H. ; Nakazato, K.
Author_Institution :
Cavendish Lab., Cambridge Univ., UK
Abstract :
A silicon random access memory using a single-electron tunnelling transistor (SETT) in the form of a multiple tunnel junction (MTJ) in a silicon nanowire has been assessed in terms of its write speed, retention time, and selectivity at an operating temperature of 4.2 K.
Keywords :
Coulomb blockade; cryogenic electronics; high-speed integrated circuits; nanotechnology; random-access storage; single electron transistors; 4.2 K; 50 nm; Coulomb blockade; SETT; Si; high-speed silicon single-electron random access memory; memory cell; multiple tunnel junction; nondestructive selectivity; operating temperature; retention time; silicon nanowire; single-electron tunnelling transistor; write speed; Capacitors; Circuits; Laboratories; Nanoscale devices; Random access memory; Silicon; Single electron memory; Temperature; Tunneling; Voltage;
Journal_Title :
Electron Device Letters, IEEE
