Energy-Efficient Management of DVFS-Enabled Integrated Microprocessors

Author

Marowka, Ami

Author_Institution

Bar-Ilan Univ., Ramat Gan, Israel

fYear

2014

fDate

12-14 Feb. 2014

Firstpage

236

Lastpage

239

Abstract

This research presents analytical models based on an energy consumption metric to analyze the impact of dynamic frequency scaling on the energy consumption of various architectural design choices for hybrid architecture chips. The power consumption implications of different processing schemes and various chip configurations were also analyzed. The analysis shows that by choosing the optimal hardware configuration, the energy savings can be increased considerably while keeping sacrifices in performance at tolerable levels.

Keywords

energy conservation; integrated circuit design; microprocessor chips; power aware computing; power consumption; DVFS-enabled integrated microprocessors; analytical models; architectural design; chip configurations; dynamic frequency scaling; energy consumption metric; energy savings; energy-efficient management; hybrid architecture chips; optimal hardware configuration; power consumption; Clocks; Energy consumption; Graphics processing units; Mathematical model; Multicore processing; Power demand; DVFS; Energy efficiency; Integrated architecture; Modeling techniques; Performance per Joule;

fLanguage

English

Publisher

ieee

Conference_Titel

Parallel, Distributed and Network-Based Processing (PDP), 2014 22nd Euromicro International Conference on

Conference_Location

Torino

ISSN

1066-6192

Type

conf

DOI

10.1109/PDP.2014.47

Filename

6787280