DocumentCode :
1256058
Title :
Buffer dimensioning of ATM25 switch
Author :
Hock, Ng Chee ; Liren, Zhang
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
Volume :
34
Issue :
2
fYear :
1998
fDate :
1/22/1998 12:00:00 AM
Firstpage :
143
Lastpage :
144
Abstract :
ATM25 is a 25.6 Mbit/s ATM specification approved by the ATM Forum. The authors present a queueing solution for dimensioning the buffer cell loss requirement of an ATM25 switch which was implemented using field programmable gate arrays
Keywords :
asynchronous transfer mode; buffer storage; digital communication; electronic switching systems; field programmable gate arrays; local area networks; queueing theory; 25.6 Mbit/s; ATM specification; ATM25 switch; FPGA implementation; LAN; buffer cell loss requirement; buffer dimensioning; field programmable gate arrays; queueing solution;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19980175
Filename :
653160
Link To Document :
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