DocumentCode
1256090
Title
A spreadsheet simulation of logic networks
Author
El-Hajj, Ali ; Kabalan, Karim Y.
Author_Institution
Dept. of Electr. Eng., American Univ. of Beirut, Lebanon
Volume
34
Issue
1
fYear
1991
fDate
2/1/1991 12:00:00 AM
Firstpage
43
Lastpage
46
Abstract
The authors present a method for simulating logic networks using spreadsheets. This method may be used to simulate combinational, sequential, synchronous and asynchronous networks. The characteristics of the method make it significant as an important tool in the analysis, design and test logic networks in education environments
Keywords
circuit CAD; circuit analysis computing; computer aided instruction; digital simulation; education; logic CAD; spreadsheet programs; CAI; asynchronous; circuit CAD; circuit analysis; combinational; digital simulation; education; logic networks; sequential; spreadsheets; synchronous; Circuit simulation; Computer networks; Displays; Educational programs; Flip-flops; Hardware; Logic design; Logic gates; Logic testing; Spreadsheet programs;
fLanguage
English
Journal_Title
Education, IEEE Transactions on
Publisher
ieee
ISSN
0018-9359
Type
jour
DOI
10.1109/13.79879
Filename
79879
Link To Document