Title :
Sign extension bit minimisation algorithm for designing VLSI inner-product-processor cells for DSP applications
Author_Institution :
Transmission R&D, Indian Telephone Ind., Bangalore, India
fDate :
1/22/1998 12:00:00 AM
Abstract :
A new sign extension bit minimisation algorithm is presented to design efficient inner-product-processor cells with reduced area and computation time. Design examples are presented for the sake of illustration
Keywords :
VLSI; DSP applications; VLSI; inner-product-processor cells; sign extension bit minimisation algorithm;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19980196
