DocumentCode :
1257316
Title :
The Alpha 21364 network architecture
Author :
Mukherjee, Shubhendu S. ; Bannon, Peter ; Lang, Steven ; Spink, Aaron ; Webb, David
Volume :
22
Issue :
1
fYear :
2002
Firstpage :
26
Lastpage :
35
Abstract :
The Alpha 21364 processor provides a high-performance, scalable, and reliable network architecture with a router that runs at 1.2 GHz and has a peak bandwidth of 22.4 Gbytes/s. Supporting configurations of up to 128 processors, this network architecture is well suited for communication-intensive server applications
Keywords :
concurrency control; microprocessor chips; multiprocessing systems; multiprocessor interconnection networks; network routing; 1.2 GHz; 22.4 Gbyte/s; Alpha 21364 network architecture; communication-intensive server applications; network architecture; reliable network architecture; router; Bandwidth; Clocks; Computer architecture; Delay; Error correction codes; Microprocessors; Network servers; Protocols; Telecommunication computing; Transistors;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.988687
Filename :
988687
Link To Document :
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