Sense amplifier signal margins and process sensitivities [DRAM]

Author

Laurent, Duane G.

Author_Institution

Embedded DRAM Design Group, STMicroelectronics Inc., Carrollton, TX, USA

Volume

49

Issue

3

fYear

2002

fDate

3/1/2002 12:00:00 AM

Firstpage

269

Lastpage

275

Abstract

A method for determining the signal margins of a sense amplifier based on the time required for the sense amplifier to achieve a given voltage separation is presented. The sense-time method generates a continuous curve whose peak value corresponds to the desired signal margin voltage and can be easily refined to provide additional precision. The method is illustrated by examining the behavior of a DRAM sense amplifier/bitline system with respect to the effects of imbalance in the parameters that most significantly affect its operation. The results of this study provide a link between the fluctuations inherent in integrated circuit processing technology and the variability of DRAM refresh times

Keywords

CMOS memory circuits; DRAM chips; MOSFET; amplifiers; fluctuations; integrated circuit technology; CMOS process; DRAM refresh time variability; DRAM sense amplifier/bitline system; continuous curve; fluctuations; integrated circuit processing technology; parameter imbalance; process sensitivities; sense amplifier; sense-time method; signal margin voltage; signal margins; voltage separation time; Capacitors; Fluctuations; Integrated circuit technology; Operational amplifiers; Rails; Random access memory; Signal design; Signal generators; Signal processing; Threshold voltage;

fLanguage

English

Journal_Title

Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Publisher

ieee

ISSN

1057-7122

Type

jour

DOI

10.1109/81.989159

Filename

989159