DocumentCode :
1259471
Title :
A 21-mW 4-Mb CMOS SRAM for battery operation
Author :
Murakami, Shuji ; Fujita, Kore-aki ; Ukita, Motomu ; Tsutsumi, Kazuhito ; Inoue, Yasuo ; Sakamoto, Osamu ; Ashida, Motoi ; Nishimura, Yasumasa ; Kohno, Yoshio ; Nishimura, Tadashi ; Anami, Kenji
Author_Institution :
Mitsubishi Electr. Corp., Itami, Japan
Volume :
26
Issue :
11
fYear :
1991
fDate :
11/1/1991 12:00:00 AM
Firstpage :
1563
Lastpage :
1570
Abstract :
The authors describe a 21-mW 4-mB CMOS SRAM for the application of memory systems which operate on 3-V batteries. A low active power is achieved by novel circuit technologies. A thin-film transistor (TFT) load memory cell effectively reduces standby current to 0.4 μA. A new multibit test circuit, which permits measurement of access time, is also introduced for a reduction of the test time. The authors describe the characteristics of the TFT memory cell and the improved memory cell design for stable cell operation. The 0.6-μm process technology used to fabricate the 4-Mb SRAM and the chip performance are outlined
Keywords :
CMOS integrated circuits; SRAM chips; thin film transistors; 0.4 muA; 0.6 micron; 21 mW; 3 V; 4 Mbit; CMOS SRAM; TFT memory cell; access time; battery operation; multibit test circuit; stable cell operation; standby current; thin-film transistor; Batteries; CMOS technology; Circuit testing; Decoding; Driver circuits; Energy consumption; Power amplifiers; Random access memory; Thin film transistors; Time measurement;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.98973
Filename :
98973
Link To Document :
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