On the Variability in Planar FDSOI Technology: From MOSFETs to SRAM Cells

In this paper, an in-depth variability analysis, i.e., from the threshold voltage V_T of metal-oxide-semiconductor field-effect-transistors (MOSFETs) to the static noise margin (SNM) of static random-access memory (SRAM) cells, is presented in fully depleted silicon-on-insulator (FDSOI) technology. The local V_T variability σ(V)_T lower than A(V)_T = 1.4 mV · μm is demonstrated. We investigated how this good V_T variability is reported on the SNM fluctuations σ_SNM at the SRAM circuit level. It is found experimentally that σ_SNM is correlated directly to the σ(V)_T of SRAM transistors without any impact of the mean SNM value. The contributions of the individual MOSFETs in the SRAM cells have been determined quantitatively by using a homemade Simulation Program with Integrated Circuit Emphasis compact model calibrated on our FDSOI electrical characteristics. The V_T variability in n-channel MOSFETs (nMOSFETs) is more critical than that in p-channel MOSFETs for SNM fluctuations, and σ(V)_T in drive nMOSFETs is the key parameter to control for minimizing σ_SNM.