Selectively dry-etched n/sup +/-GaAs/N-InAlAs/InGaAs HEMTs for LSI

Author

Kuroda, Shigeru ; Harada, Naoki ; Sasa, Shigehiko ; Mimura, Takashi ; Abe, Masayuki

Author_Institution

Fujitsu Lab. Ltd., Atsugi, Japan

Volume

11

Issue

5

fYear

1990

fDate

5/1/1990 12:00:00 AM

Firstpage

230

Lastpage

232

Abstract

High-speed n-InAlAs/InGaAs HEMT large-scale integrated circuits must have uniform device parameters. A selectively dry-etched n/sup +/-GaAs/N-InAlAs/InGaAs HEMT which has a very uniform threshold voltage is discussed. Despite the high dislocation density at the n/sup +/-GaAs layer, its performance is excellent. For a gate length of 0.92 mu m, the maximum transconductance of the HEMT is 390 mS/mm. The measured current-gain cutoff frequency is 23.7 GHz, and the maximum frequency of oscillation is 75.0 GHz. The standard deviation of the threshold voltage across a 2-in wafer is as low as 13 mV.<>

Keywords

III-V semiconductors; aluminium compounds; etching; gallium arsenide; high electron mobility transistors; indium compounds; large scale integration; 0.92 micron; 23.7 GHz; 75.0 GHz; GaAs-InAlAs-InGaAs; HEMTs; LSI; current-gain cutoff frequency; dislocation density; frequency of oscillation; gate length; maximum transconductance; selectively dry-etched; threshold voltage; uniform device parameters; uniform threshold voltage; Dry etching; Gallium arsenide; HEMTs; Indium compounds; Indium gallium arsenide; Indium phosphide; Large scale integration; MODFETs; Wet etching;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.55259

Filename

55259