Title :
A silicon bipolar decision circuit operating up to 15 Gb/s
Author :
Hauenschild, J. ; Rein, H.M. ; McFarland, W. ; Pettengill, D.
Author_Institution :
Ruhr-Univ., Bochum, Germany
fDate :
11/1/1991 12:00:00 AM
Abstract :
A master-slave D-flip-flop (MS-D-FF) IC usable as a decision circuit has been realized in an advanced self-aligned silicon bipolar technology using 0.8-μm lithography. The circuit has been operated up to 15 Gb/s (at a clock phase margin (CPM) of 180°C) with a 5-V supply voltage. The data rate of 15 Gb/s is not the limit of this decision circuit if CPM values lower than 180° can be tolerated, or if input voltage swings above 400 mVp-p are available
Keywords :
bipolar integrated circuits; digital integrated circuits; elemental semiconductors; flip-flops; silicon; 0.8 micron; 15 Gbit/s; 400 mV; 5 V; MS-D-FF; Si; advanced self-aligned bipolar technology; bipolar devices; clock phase margin; data rate; decision circuit; input voltage swings; master-slave D-flip-flop; semiconductors; supply voltage; Clocks; Energy consumption; Integrated circuit technology; Latches; Master-slave; Resistors; Semiconductor device measurement; Silicon; Size measurement; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
