Title :
RF characterisation of fully depleted SOI MOSFET with Si substrate removed
Author :
Chen, C.L. ; Burns, J.A. ; Warner, K. ; Beard, W.T.
Author_Institution :
Lincoln Lab., MIT, Lexington, MA, USA
fDate :
2/28/2002 12:00:00 AM
Abstract :
Silicon-on-insulator MOSFETs with Si substrate completely removed were characterised. The removal of the substrate, resulting in 4.8 μm wafer thickness, significantly reduced parasitic capacitance while retaining the device RF performance. This experiment demonstrates that RF circuits can be incorporated in a new three-dimensional integration technology
Keywords :
MOS integrated circuits; MOSFET; UHF integrated circuits; capacitance; field effect MMIC; high-speed integrated circuits; silicon-on-insulator; 4.8 micron; RF characterisation; Si; fully depleted SOI MOSFET; high-speed performance; parasitic capacitance; three-dimensional integration technology; wafer thickness;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20020167
