Title :
A 1-Mbit CMOS EPROM with enhanced verification
Author :
Gastaldi, Roberto ; Novosel, David ; Dallabora, Marco ; Casagrande, Giulio
Author_Institution :
SGS-Thomson Microelectron., Milan, Italy
fDate :
10/1/1988 12:00:00 AM
Abstract :
A high-speed 1-Mb EPROM (erasable programmable read-only memory) with an enhanced verify mode to insure adequate threshold shift after programming has been developed. The sense circuitry uses an offset current to shift the sense point to require higher threshold shift during verification. The access time is improved by a clocking scheme that balances the sensing circuitry between column accesses and by a chip architecture optimized for speed. The chip features an access time of 70 ns and an active current of 20 mA. A typical programming time of 50 μs has been measured. The device is processed in a 1-μm L eff CMOS process with silicides
Keywords :
CMOS integrated circuits; EPROM; integrated memory circuits; 1 Mbit; 1 micron; 20 mA; 50 mus; 70 ns; CMOS EPROM; access time; active current; chip architecture; clocking scheme; enhanced verify mode; erasable programmable read-only memory; high-speed; offset current; programming time; sense circuitry; silicide process; threshold shift; CMOS process; CMOS technology; Circuits; Clocks; Decoding; Differential amplifiers; EPROM; Semiconductor device measurement; Silicides; Time measurement;
Journal_Title :
Solid-State Circuits, IEEE Journal of
