300-V High-Side Thin-Layer-SOI Field pLDMOS With Multiple Field Plates Based on Field Implant Technology

Author

Qiao, Ming ; Zhou, Xin ; He, Yitao ; Wen, Hengjuan ; Zhao, Yuanyuan ; Zhang, Bo ; Li, Zhaoji

Author_Institution

State Key Lab. of Electron. Thin Films & Integrated Devices, Univ. of Electron. Sci. & Technol. of China, Chengdu, China

Volume

33

Issue

10

fYear

2012

Firstpage

1438

Lastpage

1440

Abstract

A novel 300-V high-side thin-layer-SOI field pLDMOS adopting field implant (FI) technology and multiple field plates (MFPs) has been developed. Breakdown mechanisms of back gate (BG) punchthrough and avalanche breakdown for highside thin-layer-SOI field pLDMOS are investigated by setting up an analytic model, simulating, and verifying experimentally. Shallow junction depth of p-field achieved by the proposed FI technology attenuates BG punchthrough effect; premature surface avalanche breakdown can be avoided by using MFPs. High-side field pLDMOS with a breakdown voltage (BV) of 340 V is experimentally realized on a 1.5-μm -thick SOI layer and successfully applied in a 200-V high-voltage switching IC.

Keywords

MOSFET; avalanche breakdown; ion implantation; semiconductor device models; silicon-on-insulator; BG punchthrough breakdown mechanisms; FI technology; MFP; back gate punchthrough breakdown mechanisms; field implant technology; high-side thin-layer-SOI field pLDMOS; high-voltage switching IC; multiple field plates; p-channel field MOSFET; premature surface avalanche breakdown; shallow junction depth; size 1.5 mum; voltage 200 V; voltage 300 V; voltage 340 V; Electric breakdown; Implants; Integrated circuits; Junctions; Logic gates; Switches; Threshold voltage; Back gate (BG); field implant (FI) technology; field pLDMOS; multiple field plates (MFPs); thin layer SOI;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2012.2210023

Filename

6268317