Finite impulse response switched-capacitor filters for the delta-sigma modulator D/A interface

Switched-capacitor finite-impulse-response (FIR) low-pass filters that can act as the first stage of the noise filter for a delta-sigma-modulation-based digital-to-analog converter are presented. The output of the filter can be generated at a reduced sampling rate without increasing the noise in the baseband. The lower output sampling rate relaxes the settling requirements of the operational amplifier. The filters have the properties that the coefficients are symmetric and take only integer values. These properties make them especially suitable for MOS switched-capacitor implementation. A symmetric implementation that has low sensitivity to capacitor mismatch is presented. The authors focus on the decimation filter for a second-order delta-sigma modulator, although extension to other order loops is possible