An in-system reprogrammable 32 K×8 CMOS flash memory

The authors describe the design and performance of a 192-mil² 256 K (32 K×8) flash memory targeted for in-system reprogrammable applications. Developed from a 1.5 μm EPROM base technology with a one-transistor 6×6-μm² cell, the device electrically erases all cells in the array matrix in 200 ms and electrically programs at the rate of 100 μs/byte typical. The read performance is equivalent to comparable-density CMOS EPROM devices with a chip-enable access time of 110 ns at 30-mA active current consumption. A command-port interface facilitates microprocessor-controlled reprogramming capability. Device reliability has been increased over byte-alterable EEPROMs by reducing the program power supply to 12 V. Cycling endurance experiments have demonstrated that the device is capable of more than 10000 erase/program cycles