• DocumentCode
    1265678
  • Title

    RNS-enabled digital signal processor design

  • Author

    Ramírez, J. ; García, A. ; López-Buedo, S. ; Lloris, A.

  • Author_Institution
    Dpto. de Electronica y Tecnologia, Campus Universitario Fuentenueva, Granada, Spain
  • Volume
    38
  • Issue
    6
  • fYear
    2002
  • fDate
    3/14/2002 12:00:00 AM
  • Firstpage
    266
  • Lastpage
    268
  • Abstract
    Residue number system (RNS) is explored for implementation of fast digital signal processors with the design of an RNS-based SIMD RISC processor. Simulations conducted on programmable logic show a sustained advantage over commercial chips for a representative set of applications, while prospective results on VLSI technology are also promising
  • Keywords
    VLSI; digital signal processing chips; integrated circuit design; parallel architectures; programmable logic devices; reduced instruction set computing; residue number systems; SIMD RISC processor; VLSI technology; design simulation; digital signal processor; programmable logic; residue number system;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20020192
  • Filename
    992623
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1265678