DocumentCode :
1266155
Title :
Efficient Identification of Unstable Loops in Large Linear Analog Integrated Circuits
Author :
Mukherjee, Parijat ; Fang, G. Peter ; Burt, Rod ; Li, Peng
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas A&M Univ., College Station, TX, USA
Volume :
31
Issue :
9
fYear :
2012
Firstpage :
1332
Lastpage :
1345
Abstract :
Stability analysis is one of the key challenges in analog circuit design. As feature sizes continue to shrink and the effect of parasitics becomes more dominant, we are forced to deal with stability analysis of increasingly complex multiloop structures with potentially hundreds of loops-a task that can no longer be dealt with using traditional methods. An automated stability checker tool that detects sources of potential ringing behavior within a reasonable turnaround time has thus been made necessary. Such a tool would not just help in debug but could also serve as a postlayout validation tool. We thus present an efficient loop finder algorithm to identify sources of ringing in large linear analog circuits. At the heart of our automated stability checker are two newly developed computationally efficient algorithms-the first to detect all poles within a given region of interest with a high degree of confidence and the second to extract second-order approximations of node impedance transfer functions given these pole locations. In this paper, we discuss these algorithms in detail, propose various optimization heuristics to further speed up the pole discovery algorithm, and then go on to develop a parallel implementation of both these underlying algorithms. It is demonstrated that these approaches together allow us to outperform the original loop finder algorithm based on direct eigen methods by two to four orders of magnitude and thus enable stability analysis of even larger extracted industrial designs than was previously possible while providing reasonable turnaround time.
Keywords :
analogue integrated circuits; approximation theory; circuit CAD; eigenvalues and eigenfunctions; integrated circuit design; optimisation; program debugging; transfer functions; automated stability checker tool; complex multiloop structures; computationally efficient algorithms; direct eigen methods; industrial designs; large linear analog integrated circuit design; loop finder algorithm; node impedance transfer functions; optimization heuristics; pole detection; pole discovery algorithm; postlayout validation tool; second-order approximation extraction; stability analysis; turnaround time; unstable loop efficient identification; Approximation methods; Circuit stability; Damping; Impedance; Stability criteria; Transfer functions; Analog circuit design; eigenvalue problem; model order reduction; small-signal analysis; stability analysis;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2012.2194492
Filename :
6269974
Link To Document :
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