DocumentCode :
1266168
Title :
X -Canceling MISR Architectures for Output Response Compaction With Unknown Values
Author :
Yang, Joon-Sung ; Touba, Nur A.
Author_Institution :
SungKyunKwan Univ., Suwon, South Korea
Volume :
31
Issue :
9
fYear :
2012
Firstpage :
1417
Lastpage :
1427
Abstract :
In this paper, an X-tolerant multiple-input signature register (MISR) compaction methodology that compacts output responses containing unknown X values is described. Each bit of the MISR signature is expressed as a linear combination in terms of Xs by symbolic simulation. Linearly dependent combinations of the signature bits are identified with Gaussian elimination and XORed to remove X values and yield deterministic values. Two X-canceling MISR architectures are proposed and analyzed with industrial designs. This paper also shows the correlation between the estimated result based on idealized modeling and the actual data for real circuits for error coverage, hardware overhead, and other metrics. Experimental results indicate that high error coverage can be achieved with X-canceling MISR configurations and it highly correlates with actual results.
Keywords :
Gaussian processes; design for testability; integrated circuit testing; Gaussian elimination; MISR compaction methodology; MISR signature; X value; X-canceling MISR architecture; X-tolerant multiple-input signature register; deterministic value; error coverage; hardware overhead; industrial design; linear combination; output response compaction; real circuit; signature bit; symbolic simulation; Clocks; Compaction; Computer architecture; Hardware; Registers; Testing; Vectors; $X$ -canceling MISR; Gaussian elimination; output response compaction; symbolic simulation;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2012.2193579
Filename :
6269976
Link To Document :
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