A Low Voltage Quadrature VCO Implemented With Series Frequency Doublers

Author

Jang, Sheng-Lyang ; Lee, Tai-Sung ; Hsue, Ching-Wen ; Liu, Cheng-Chen

Author_Institution

Dept. of Electron. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei, Taiwan

Volume

19

Issue

12

fYear

2009

Firstpage

819

Lastpage

821

Abstract

Using the transformer coupling technique, this letter presents a new quadrature voltage-controlled oscillator (QVCO) with bottom series-coupled transistors. The proposed CMOS QVCO has been implemented with the TSMC 0.13 mum 1P8M CMOS process, and the die area is 1.03 times 0.914 mm². At the supply voltage of 1.0 V, the total power consumption is 3.56 mW. The free-running frequency of the QVCO is tunable from 5.43 GHz to 5.92 GHz as the tuning voltage is varied from 0.0 V to 1.0 V. The measured phase noise at 1 MHz frequency offset is -117.98 dBc/Hz at the oscillation frequency of 5.5 GHz and the figure of merit (FOM) of the proposed QVCO is -187.27 dBc/Hz.

Keywords

CMOS integrated circuits; phase noise; transformers; voltage-controlled oscillators; CMOS QVCO; TSMC; figure of merit; frequency 5.43 GHz to 5.92 GHz; low voltage quadrature VCO; phase noise; power 3.56 mW; quadrature voltage-controlled oscillator; series frequency doublers; series-coupled transistors; size 0.13 mum; transformer coupling; voltage 1 V; Bottom-series coupled quadrature voltage-controlled oscillator (QVCO); CMOS; frequency doublers; transformers;

fLanguage

English

Journal_Title

Microwave and Wireless Components Letters, IEEE

Publisher

ieee

ISSN

1531-1309

Type

jour

DOI

10.1109/LMWC.2009.2033527

Filename

5313840