Title :
Subthreshold Degradation of Gate-all-Around Silicon Nanowire Field-Effect Transistors: Effect of Interface Trap Charge
Author :
Hong, B.H. ; Cho, N. ; Lee, S.J. ; Yu, Y.S. ; Choi, L. ; Jung, Y.C. ; Cho, K.H. ; Yeo, K.H. ; Kim, D.-W. ; Jin, G.Y. ; Oh, K.S. ; Park, D. ; Song, S.-H. ; Rieh, J.-S. ; Hwang, S.W.
Author_Institution :
Res. Center for Time-Domain Nano-functional Devices, Korea Univ., Seoul, South Korea
Abstract :
We measured and analyzed the subthreshold degradation of the gate-all-around (GAA) silicon nanowire field-effect transistors with the length of 300/500 nm and the radius of 5 nm. An analytical model incorporating the effect of interface traps quantitatively explained the measured subthreshold swing (SS) degradation. A simple electrostatic argument showed that the GAA device had smaller degradation of SS values than planar devices for the same interface trap densities.
Keywords :
elemental semiconductors; field effect transistors; interface states; nanowires; silicon; Si; electrostatic argument; gate-all-around silicon nanowire field-effect transistor; interface trap charge; interface trap density; size 300 nm; size 5 nm; size 500 nm; subthreshold degradation; subthreshold swing degradation; Analytical models; Degradation; Electron traps; Logic gates; MOSFETs; Silicon; Gate-all-around (GAA); interface trap charge; silicon nanowire field-effect transistor (SNWFET); subthreshold degradation;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2011.2159473
