DocumentCode :
1267523
Title :
D-band divide-by-3 injection-locked frequency divider in 65 nm CMOS
Author :
Lee, I-Ting ; Wang, Ching-Hung ; Sha, J.-R. ; Juang, Ying-Zong ; Liu, Shen-Iuan
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume :
48
Issue :
17
fYear :
2012
Firstpage :
1041
Lastpage :
1042
Abstract :
A D-band divide-by-3 injection-locked frequency divider (ILFD) is realised in 65 nm CMOS process. The ILFD adopts the dual-injection and current-reused techniques. It achieves the input locking range of 122.4-125.4 GHz and its power consumption is 9.1 mW for a supply of 1.3 V excluding buffers and the biasing circuit.
Keywords :
CMOS integrated circuits; field effect MIMIC; frequency dividers; CMOS process; D-band divide-by-3 ILFD; D-band divide-by-3 injection-locked frequency divider; current-reused techniques; dual-injection techniques; frequency 122.4 GHz to 125.4 GHz; power 9.1 mW; power consumption; size 65 nm; voltage 1.3 V;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el.2012.1885
Filename :
6272439
Link To Document :
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