TSC-error C/D circuits for SEC/DED product codes

A new design technique for totally self-checking (TSC) error correcting/detecting (C/D) circuits of single-error correcting double-error detecting (SEC/DED) product codes is described. The structure of these circuits achieves concurrent fault detection and location under normal input conditions. A separate internal fault (IF) indication is provided. This improves the reliability, maintainability and availability of the entire fault-tolerant system, because faults are detected and repaired before the appearance of input errors. The above error C/D circuits are composed of TSC error detectors, error locators, and error correctors. These circuits are two-rail TSC checkers, and are designed using an algebraic approach.