• DocumentCode
    1268315
  • Title

    Nanometer technology effects on fault models for IC testing

  • Author

    Aitken, Robert C.

  • Author_Institution
    Agilent Technol., Palo Alto, CA, USA
  • Volume
    32
  • Issue
    11
  • fYear
    1999
  • fDate
    11/1/1999 12:00:00 AM
  • Firstpage
    46
  • Lastpage
    51
  • Abstract
    Accepted methods for testing integrated circuits, such as the fault models examined here, require ongoing research and continual adaptation to accommodate increasing circuit size, growing defect subtlety, and less varied manufacturing processes
  • Keywords
    integrated circuit modelling; integrated circuit testing; nanotechnology; IC testing; fault model; nanometer technology; CMOS technology; Circuit faults; Circuit testing; Fault detection; High speed integrated circuits; Integrated circuit modeling; Integrated circuit testing; Manufacturing processes; Semiconductor device modeling; Voltage;
  • fLanguage
    English
  • Journal_Title
    Computer
  • Publisher
    ieee
  • ISSN
    0018-9162
  • Type

    jour

  • DOI
    10.1109/2.803640
  • Filename
    803640
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1268315