Title :
Nanometer technology effects on fault models for IC testing
Author :
Aitken, Robert C.
Author_Institution :
Agilent Technol., Palo Alto, CA, USA
fDate :
11/1/1999 12:00:00 AM
Abstract :
Accepted methods for testing integrated circuits, such as the fault models examined here, require ongoing research and continual adaptation to accommodate increasing circuit size, growing defect subtlety, and less varied manufacturing processes
Keywords :
integrated circuit modelling; integrated circuit testing; nanotechnology; IC testing; fault model; nanometer technology; CMOS technology; Circuit faults; Circuit testing; Fault detection; High speed integrated circuits; Integrated circuit modeling; Integrated circuit testing; Manufacturing processes; Semiconductor device modeling; Voltage;
