DocumentCode
1268323
Title
Nanometer technology challenges for test and test equipment
Author
Needham, Wayne M.
Volume
32
Issue
11
fYear
1999
fDate
11/1/1999 12:00:00 AM
Firstpage
52
Lastpage
57
Abstract
Designers can now place millions of transistors on a single chip and propagate a signal through them at speeds approaching one gigahertz. With all this progress on the design front, it´s easy to overlook a simple fact: more complex designs also pose problems for manufacturing and test. The challenges are especially acute in test. Test costs traditionally rise as frequency, transistors, and pin counts increase. Without substantial changes in test technology, the billion-transistor ICs projected within the next 12 years could cost many times more to test than the 40-million-transistor microprocessors of today. Test costs today are already high. Current IC pin counts are in the hundreds. Nanometer designs are anticipated to have pin counts in the thousands. Manufacturers will continue to pay these high test-equipment costs far some time because the cost of changing systems is even more staggering. Why are these costs so high and how are they affected by nanometer technologies? The author answers these questions by looking to the defects that occur in semiconductor manufacturing
Keywords
automatic test equipment; design for testability; integrated circuit economics; integrated circuit testing; nanotechnology; ATE; DFT; IC pin counts; complex designs; defects; manufacturing; nanometer technology; semiconductor manufacturing; test costs; test equipment; transistors; Bridge circuits; CMOS technology; Costs; Electrostatic discharge; Geometry; Manufacturing; Switches; Test equipment; Testing; Voltage;
fLanguage
English
Journal_Title
Computer
Publisher
ieee
ISSN
0018-9162
Type
jour
DOI
10.1109/2.803641
Filename
803641
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