Title :
Versatile divider circuits up to 9 GHz input-frequency realised in high-speed BICMOS
Author :
Weger, P. ; Felder, A. ; Kerber, M. ; Klose
Author_Institution :
Siemens AG, Munchen, Germany
Abstract :
A versatile divider circuit with three dividing ratios of 2:1, 5:1 and 10:1 was realised in a high speed BICMOS technology, which is characterised by a cut-off frequency of 10.5 GHz and a minimum ECL gate delay time of 50 ps. The maximum input frequencies of the divider circuits are 7.5 and 9 GHz.
Keywords :
BIMOS integrated circuits; digital integrated circuits; dividing circuits; frequency dividers; microwave integrated circuits; 10.5 GHz; 50 ps; 7.5 GHz; 9 GHz; BICMOS technology; ECL gate delay time; cut-off frequency; high-speed BICMOS; maximum input frequencies; versatile divider circuit;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19901257
