DocumentCode
1270010
Title
VLSI computing architectures for Haar transform
Author
Liu, K.J.R.
Author_Institution
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
Volume
26
Issue
23
fYear
1990
Firstpage
1962
Lastpage
1963
Abstract
The Haar transform is very useful in many signal and image processing applications where real-time implementation is essential. Three VLSI computing architectures are proposed for fast implementation of the Haar transform. Comparisons on the advantages and disadvantages of the proposed architectures are also presented.<>
Keywords
VLSI; computer architecture; computerised picture processing; digital signal processing chips; pipeline processing; transforms; Haar transform; VLSI computing architectures; fast implementation; image processing; real-time implementation; signal processing; Computer architecture; Digital signal processors; Image processing; Pipeline processing; Transforms; Very-large-scale integration;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19901269
Filename
59516
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