Title :
Current-Charge-Pump Residue Amplification for Ultra-Low-Power Pipelined ADCs
Author :
Shen, Junhua ; Kinget, Peter R.
Author_Institution :
Columbia Univ., New York, NY, USA
fDate :
7/1/2011 12:00:00 AM
Abstract :
A low-power multiplying digital-to-analog conversion (MDAC) circuit realization using a current-charge-pump (CCP) residue amplifier is presented. It takes advantage of the improved timing resolution in advanced CMOS technologies by transforming the voltage signal into an equivalent time-domain representation. The proposed CCP MDAC only uses switches, current sources, capacitors, and a comparator. It occupies a small area and achieves high power efficiency by eliminating operational transconductance amplifiers for the interstage amplification and by avoiding power-hungry buffers for the reference voltages. The CCP amplifier principle is demonstrated in a 1-V 100-MS/s 8-bit CCP pipelined analog-to-digital conversion proof-of-concept prototype in a 90-nm CMOS.
Keywords :
CMOS analogue integrated circuits; amplification; analogue-digital conversion; comparators (circuits); digital-analogue conversion; low-power electronics; operational amplifiers; pipeline processing; time-domain analysis; CCP MDAC; CCP amplifier principle; CCP pipelined analog-to-digital conversion; CMOS technology; current source; current-charge-pump residue amplification; high power efficiency; low-power multiplying digital-to-analog conversion circuit; operational transconductance amplifier; power hungry buffer; proof-of-concept prototype; size 90 nm; time domain representation; ultra-low-power pipelined ADC; voltage 1 V; CMOS integrated circuits; Capacitors; Clocks; Delay; Latches; Noise; Prototypes; Analog-to-digital converter (ADC); current-change-pump (CCP) amplification; multiplying digital-to-analog conversion MDAC; pipelined ADC; residue amplification; ultra low-power ADC;
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2011.2158259
