An Investigation of DC and RF Safe Operating Area of n-p-n $+$ p-n-p SiGe HBTs on SOI

We have examined the reliability risks of complementary SiGe HBTs on thick-film silicon on insulator (SOI). DC stress techniques, such as reverse emitter-base (EB) stress, mixed-mode stress, and flyback measurements, were used to characterize the safe operating area of n-p-n and p-n-p SiGe HBTs fabricated on SOI substrates. The measurements were analyzed based on fundamental damage mechanisms, such as hot carriers generated at the EB and collector-base junctions during large reverse voltage, and thermal runaway as a result of high current phenomena. RF stress (using a large amplitude continuous-wave signal) was also performed to examine the reliability of complementary bipolar complementary metal-oxide-semiconductor devices and circuits in an RF context. In both cases, p-n-p SiGe HBTs were found to be more reliable than n-p-n SiGe HBTs, a fact that may offer opportunities for circuit design optimization.