Title :
Analysis of stratified testing for multichip module systems
Author :
Park, Nohpill ; Lombardi, Fabrizio
Author_Institution :
Dept. of Comput. Sci., Oklahoma State Univ., Stillwater, OK, USA
fDate :
3/1/2002 12:00:00 AM
Abstract :
A stratified technique is proposed for testing multichip module systems. Stratification in multichip modules due to the different nature and procurement of these chips is exploited for achieving a high quality-level at a saving of a significant number of tests during assembly. Unlike conventional random testing, the proposed approach (referred to as the lowest yield-stratum first-testing), takes into account the uneven known-good-yield. In the lowest yield-stratum first-testing approach, the effect of the uneven known-good-yield between strata is analyzed with respect to the variance of known-good-yield and the sample size. The lowest yield-stratum first-testing approach significantly outperforms conventional random testing and random stratified testing. This method is competitive even compared to a conventional exhaustive testing at a very small loss in quality-level by greedy (first) testing the chips in the stratum with lower known-good-yield. A Markov-chain model is developed to analyze these testing approaches under the assumption of physically independent failure of chips in multichip module systems
Keywords :
Markov processes; integrated circuit testing; integrated circuit yield; multichip modules; Markov-chain model; assembly; defect-level; lowest yield-stratum first-testing; multichip module systems; physically independent chip failure; quality assurance; random stratified testing; stratified testing; uneven known-good-yield; Analysis of variance; Assembly; Automatic testing; Built-in self-test; Design for testability; Multichip modules; Procurement; Sampling methods; System testing; Very large scale integration;
Journal_Title :
Reliability, IEEE Transactions on