Title :
Cascadable one/two-dimensional digital convolver
Author :
Arambepola, B. ; Patel, V.B. ; Cheung, Guy
Author_Institution :
GEC Res. Ltd., Wembley, UK
fDate :
4/1/1988 12:00:00 AM
Abstract :
An architecture and a design for a high-speed CMOS digital convolver which can be used for real-time one-dimensional (1-D) and two-dimensional (2-D) signal processing are presented. In the 2-D mode this device can be used to convolve 10-bit image data with a 3×3 or 2×5 2-D eight-bit-per-coefficient impulse response at 20 M samples/s throughput. In 1-D applications it can be used as a ten-tap finite-impulse response (FIR) filter. Devices can be cascaded to increase the order of the convolution reference in both dimensions
Keywords :
CMOS integrated circuits; VLSI; digital filters; picture processing; signal processing; 10-bit image data; 1D digital convolver; 2D digital convolver; ASIC; FIR filters; VLSI; architecture; cascaded devices; custom IC; design; digital filters; high-speed CMOS digital convolver; image processing; throughput 20 M samples/s; CMOS process; Convolution; Convolvers; Delay lines; Digital signal processing; Finite impulse response filter; Logic arrays; Signal design; Throughput; Transversal filters; Two dimensional displays;
Journal_Title :
Solid-State Circuits, IEEE Journal of
