DocumentCode
1271224
Title
Fault equivalence in PLAs and prevention design
Author
Liu, B.-D. ; Shaw, G.T.
Author_Institution
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Volume
26
Issue
23
fYear
1990
Firstpage
1925
Lastpage
1926
Abstract
The fault equivalent problem in PLAs is examined and some design rules to solve this problem are proposed. The hardware required is only one extra product line, one bit line and one output line for the worst case.
Keywords
electrical faults; logic CAD; logic arrays; logic testing; PLA design; PLAs; bit line; built-in self-test; fault equivalent problem; output line; prevention design; product line;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19901246
Filename
59524
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