Global routing with crosstalk constraints

Author

Zhou, Hai ; Wong, D.F.

Author_Institution

Adv. Technol. Group, Synopsys Inc., Mountain View, CA, USA

Volume

18

Issue

11

fYear

1999

fDate

11/1/1999 12:00:00 AM

Firstpage

1683

Lastpage

1688

Abstract

Due to the scaling down of device geometry and increasing of frequency in deep submicron designs, crosstalk between interconnection wires has become an important issue in very large scale integration (VLSI) layout design. In this paper, we consider crosstalk avoidance during global routing. We present a global routing algorithm based on a new Steiner tree formulation and the Lagrangian relaxation technique. We also give theoretical results on the complexity of the problem

Keywords

VLSI; circuit complexity; circuit layout CAD; crosstalk; integrated circuit interconnections; integrated circuit layout; network routing; trees (mathematics); Lagrangian relaxation technique; NP-hard problem; Steiner tree formulation; VLSI layout design; complexity; crosstalk between interconnection wires; crosstalk constraints; deep submicron designs; global routing; routing algorithm; sequential routing; two-stage heuristic approach; Capacitance; Coupling circuits; Crosstalk; Driver circuits; Geometry; Integrated circuit interconnections; Lagrangian functions; Routing; Very large scale integration; Wires;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.806813

Filename

806813