Title :
A subnanosecond 5-kbit bipolar ECL RAM
Author :
Chuang, Ching-Te ; Tang, Denny D. ; Li, G.P. ; Franch, R.L. ; Ketchen, Mark B. ; Ning, Tak H. ; Brown, K.H. ; Hu, Chih-chun
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fDate :
10/1/1988 12:00:00 AM
Abstract :
The authors describe a subnanosecond 512×10-b bipolar ECL RAM using a 1.2-μm silicon-filled trench-isolated double-poly self-aligned bipolar technology in conjunction with a novel sense-amplifier reference circuit configuration. A 5-kb RAM with an access time of 0.85 ns at a power dissipation of 2.4 W is realized in a chip area of 3.4×4.4 mm2
Keywords :
bipolar integrated circuits; emitter-coupled logic; integrated circuit technology; integrated memory circuits; random-access storage; 0.85 ns; 1.2 micron; 2.4 W; 4.4 mm; 5120 bit; ECL; RAM; access time; chip area; power dissipation; sense-amplifier reference circuit; subnanosecond; trench-isolated double-poly self-aligned bipolar technology; Circuit synthesis; Isolation technology; Metallization; Power dissipation; Propagation delay; Random access memory; Read-write memory; Silicon; Transistors; Voltage fluctuations;
Journal_Title :
Solid-State Circuits, IEEE Journal of
