Title :
Pulse-Biased Low-Power Low-Phase-Noise UHF LC-QVCO for 866 MHz RFID Front-End
Author :
Li, Jie ; Hasan, S. M Rezaul
Author_Institution :
Center for Res. in Analog & VLSI Microsyst. Design (CRAVE), Massey Univ., Auckland, New Zealand
Abstract :
This paper discusses an 866-MHz UHF quadrature voltage-controlled oscillator (QVCO) for RFID front-end. The VCO achieved an improved phase noise performance of -130 dBc/Hz at a carrier-offset of 1 MHz using an improved architecture employing pulsed self-biasing. It was fabricated using the IBM 130-nm CMOS process with the core VCO occupying around 0.36 mm2 die area. The loading effect of finite gds for nanometric CMOS design was also considered. The VCO achieved 8% tuning range with very low quadrature error. It was tested using a power supply in the range of 0.6-1 V, drawing a maximum of 2.5 mW. In addition, it achieved a figure of merit of -185 dBc/Hz.
Keywords :
CMOS integrated circuits; UHF oscillators; integrated circuit design; low-power electronics; phase noise; radiofrequency identification; voltage-controlled oscillators; RFID front-end; UHF quadrature voltage-controlled oscillator; frequency 866 MHz; low-phase-noise UHF LC-QVCO; low-power UHF LC-QVCO; nanometric CMOS design; phase noise performance; power 2.5 mW; pulse-biased UHF LC-QVCO; pulsed self-biasing; size 130 nm; voltage 0.6 V to 1 V; Couplings; Inductors; MOS devices; Phase noise; Tuning; $1/f$ noise; Folded cascode; low power; phase noise; pulsed biasing; quadrature voltage-controlled oscillator (QVCO);
Journal_Title :
Microwave Theory and Techniques, IEEE Transactions on
DOI :
10.1109/TMTT.2012.2209441