Title :
Coordinating dissimilar line relays in a communications-assisted scheme
Author :
Tucker, William ; Burich, Andrew ; Thompson, Mark ; Anne, RadhaKiranmaye ; Vasudevan, S.
Author_Institution :
American Electr. Power, USA
fDate :
March 31 2014-April 3 2014
Abstract :
Communications-assisted (pilot) protection schemes are used to provide high-speed simultaneous fault clearance from each end of a line. The most common pilot schemes used in the industry are permissive overreaching transfer trip (POTT) and directional comparison blocking (DCB). For secure operation, ensuring coordination between the local and remote relays is absolutely necessary. A common myth is that POTT schemes do not have to be coordinated. However, when applying modern POTT schemes that include advanced features such as current reversal and echo logic, reverse blocking elements play an important role and need to be properly coordinated. Good engineering practice suggests using the same type of relay at both terminals in a pilot scheme. However, sometimes this is not possible due to construction, project schedule timing, or budget constraints. Further, when the line is a tie line, transmission facility owners often mutually agree to select dissimilar relays to prevent having to vary from their standards for maintenance, spare equipment, and training reasons. Using different models, manufacturers, and vintages of microprocessor-based relays in a pilot scheme presents coordination difficulties due to different operation principles that result in different sensitivities, speeds, and transient responses. This paper presents a number of such problems and challenges discovered in realworld applications. The paper then proposes solutions to minimize the risk of misoperation and achieve good fault coverage. Finally, the paper discusses the pros and cons of the proposed solutions, keeping in mind the effect power system faults have on power quality and system stability.
Keywords :
microprocessor chips; power transmission faults; power transmission lines; relay protection; DCB; POTT schemes; budget constraints; communication-assisted protection schemes; coordinating dissimilar line relays; current reversal logic; directional comparison blocking; echo logic; high-speed simultaneous fault clearance; microprocessor-based relays; permissive overreaching transfer trip; pilot protection schemes; power quality; power system faults; power system stability; project schedule timing; reverse blocking elements; tie line; transient responses; Optical fiber communication; Relays;
Conference_Titel :
Protective Relay Engineers, 2014 67th Annual Conference for
Conference_Location :
College Station, TX
Print_ISBN :
978-1-4799-4740-9
DOI :
10.1109/CPRE.2014.6798998