A flexible architecture for the computation of direct and inverse transforms in H.264/AVC video codecs

Author

Dias, T. ; López, S. ; Roma, N. ; Sousa, L.

Author_Institution

Dept. of Electron., Telecommun. & Comput. Eng., Lisbon, Portugal

Volume

57

Issue

2

fYear

2011

fDate

5/1/2011 12:00:00 AM

Firstpage

936

Lastpage

944

Abstract

A new high throughput and scalable architecture for unified transform coding in H.264/AVC is proposed in this paper. Such flexible structure is capable of computing all the 4×4 and 2×2 transforms for Ultra High Definition Video (UHDV) applications (4320×7680@30fps) in real-time and with low hardware cost. These significantly high performance levels were proven with the implementation of several different configurations of the proposed structure using both FPGA and ASIC 90 nm technologies. In addition, such experimental evaluation also demonstrated the high area efficiency of the proposed architecture, which in terms of Data Throughput per Unit of Area (DTUA) is at least 1.5 times more efficient than its more prominent related designs.

Keywords

field programmable gate arrays; video codecs; video coding; ASIC 90; DTUA; FPGA; H.264/AVC video codecs; data throughput per unit of area; direct transforms; flexible architecture; inverse transforms; scalable architecture; ultra high definition video; Arrays; Hardware; Kernel; Streaming media; Transform coding; Transforms; H.264/AVC; Scalable architecture; Unified transform kernel; Video coding;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/TCE.2011.5955243

Filename

5955243