A CMOS imager hybridized to an avalanche multiplied film

Author

Takiguchi, Yoshiro ; Maruyama, Hirotaka ; Kosugi, Mitsuo ; Andoh, Fumihiko ; Kato, Tsutomu ; Tanioka, Kenkichi ; Yamazaki, Junichi ; Tsuji, Kiyotaka ; Kawamura, Tatsuro

Author_Institution

NHK Sci. & Tech. Res. Labs., Tokyo, Japan

Volume

44

Issue

10

fYear

1997

fDate

10/1/1997 12:00:00 AM

Firstpage

1783

Lastpage

1788

Abstract

A highly sensitive solid-state imager has been made by connecting an avalanche multiplier film to a MOS readout circuit through microbump electrodes. Optimization of the vapor-deposition conditions for the indium bump material made it possible for microbumps 5 μm in diameter and 5 μm in height to be formed into a 2/3-in matrix array of 380 000 pixels. A prototype imager was constructed with a 0.5-μm thick avalanche photoconductive film. Clear avalanche multiplication of about ten times was observed at an applied voltage of 75 V. The imager had a good resolution and no recognizable afterimages

Keywords

CMOS integrated circuits; avalanche breakdown; image resolution; image sensors; microassembling; nondestructive readout; photoconducting devices; 0.5 mum; 380000 pixel; 5 mum; 75 V; CMOS imager; HARP; In; In bump material; MOS readout circuit; avalanche multiplied film; avalanche photoconductive film; high-gain avalanche rushing amorphous photoconductor; highly sensitive solid-state imager; microbump electrodes; pixel matrix array; resolution; vapor-deposition conditions optimization; CMOS image sensors; Electrodes; Image resolution; Indium; Joining processes; Photoconducting materials; Photoconductivity; Prototypes; Solid state circuits; Voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.628837

Filename

628837