DocumentCode
1276462
Title
A 14-bit intrinsic accuracy Q2 random walk CMOS DAC
Author
Van der Plas, Geert A M ; Vandenbussche, Jan ; Sansen, Willy ; Steyaert, Michel S J ; Gielen, Georges G E
Author_Institution
ESAT-MICAS, Katholieke Univ., Leuven, Heverlee, Belgium
Volume
34
Issue
12
fYear
1999
fDate
12/1/1999 12:00:00 AM
Firstpage
1708
Lastpage
1718
Abstract
In this paper, a 14-bit, 150-MSamples/s current steering digital-to-analog converter (DAC) is presented. It uses the novel Q2 random walk switching scheme to obtain full 14-bit accuracy without trimming or tuning. The measured integral and differential nonlinearity performances are 0.3 and 0.2 LSB, respectively; the spurious-free dynamic range is 84 dB at 500 kHz and 61 dB at 5 MHz. Running from a single 2.7-V power supply, it has a power consumption of 70 mW for an input signal of 500 kHz and 300 mW for an input signal of 15 MHz. The DAC has been integrated in a standard digital single-poly, triple-metal 0.5-μm CMOS process. The die area is 13.1 mm2
Keywords
CMOS integrated circuits; digital-analogue conversion; integrated circuit design; 0.5 micron; 14 bit; 2.7 V; 500 kHz to 5 MHz; 70 to 300 mW; CMOS DAC; Q2 random walk switching scheme; current steering digital-to-analog converter; die area; differential nonlinearity performances; input signal; integral nonlinearity performances; intrinsic accuracy; power consumption; spurious-free dynamic range; triple-metal CMOS process; CMOS analog integrated circuits; CMOS process; CMOS technology; Current measurement; Digital-analog conversion; Dynamic range; Energy consumption; Linearity; Power supplies; Programmable logic arrays;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.808896
Filename
808896
Link To Document