DocumentCode :
1276517
Title :
A Nyquist-rate pipelined oversampling A/D converter
Author :
Paul, Susanne A. ; Lee, Hae-Seung ; Goodrich, John ; Alailima, Titiimaea F. ; Santiago, Daniel D.
Author_Institution :
Lincoln Lab., MIT, Lexington, MA, USA
Volume :
34
Issue :
12
fYear :
1999
fDate :
12/1/1999 12:00:00 AM
Firstpage :
1777
Lastpage :
1787
Abstract :
A pipelined Δ-Σ analog-to-digital-converter architecture is described that incorporates the high speed of pipelined converters and the high resolution of oversampling quantization. A prototype, containing both modulation and decimation circuits on a single chip, is implemented using a 1.2-μm commercial CMOS process. It uses charge-coupled-device elements to perform pipelined analog operations. It exhibits a maximum data rate of 18 MHz, a signal-to-noise ratio of 74 dB, spurious-free dynamic range of 78 dB, differential nonlinearity of <0.15 LSB at 13 bits, and power dissipation of 324 mW
Keywords :
CMOS integrated circuits; analogue-digital conversion; charge-coupled device circuits; delta-sigma modulation; pipeline processing; quantisation (signal); 1.2 micron; 13 bit; 18 MHz; 324 mW; CMOS chip; Nyquist rate sampling; charge coupled device; decimation circuit; differential nonlinearity; dynamic range; modulation circuit; oversampling quantization; pipelined delta-sigma analog-to-digital-converter; power dissipation; signal-to-noise ratio; Analog-digital conversion; Charge coupled devices; Circuits; Clocks; Feedback; Laboratories; Pipelines; Prototypes; Quantization; Signal processing;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.808902
Filename :
808902
Link To Document :
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