Title :
On design of low-noise adaptive output drivers
Author :
Povazanec, J. ; Choy, C.S. ; Chan, C.F.
Author_Institution :
Dept. of Electron. Eng., Chinese Univ. of Hong Kong, Shatin, Hong Kong
fDate :
12/1/1999 12:00:00 AM
Abstract :
In this paper new findings to design fast and low noise generating CMOS output drivers are presented. The adaptive technique applied not only reduces power-rail noise, but also removes overshoots and unnecessary switching. A new multistage output driver is compared to four standard designs for time delay, maximum dynamic current and power-rail noise under various loading conditions. A comparison of silicon area is also given
Keywords :
CMOS logic circuits; adaptive control; circuit feedback; driver circuits; integrated circuit design; integrated circuit noise; logic design; adaptive output drivers; fast CMOS output drivers; low-noise drivers; maximum dynamic current; multistage output driver; overshoot removal; power-rail noise reduction; time delay; Adaptive control; Delay effects; Driver circuits; Inverters; Noise generators; Noise reduction; Noise shaping; Power generation; Power supplies; Programmable control;
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
