Design and implementation of a fast algorithm for modulated lapped transform

Author

Jing, C.Y. ; Tai, H.J.

Author_Institution

InVision Technologies, Inc, Newark, CA, USA

Volume

149

Issue

1

fYear

2002

fDate

2/1/2002 12:00:00 AM

Firstpage

27

Lastpage

32

Abstract

A new fast algorithm for the computation of the modulated lapped transform (MLT) is proposed and its efficient implementation using pipelining techniques and complex programmable logic device (CPLD) is presented. The new algorithm computes a length-M MLT via the length-M/2 fast Fourier transform (FFT). Computational overhead due to data shuffling in pre-processing and post-processing is offset in hardware realisation. Hence the overall throughput of the MLT computation for real-time applications is significantly improved. The pipelined CPLD architecture and circuitry are described in detail. Computational complexity of the proposed algorithm is analysed, and throughput improvement is verified by experimental results

Keywords

computational complexity; fast Fourier transforms; modulation; pipeline processing; programmable logic devices; signal reconstruction; CPLD; FFT; complex programmable logic device; computational complexity; computational overhead; data shuffling; fast Fourier transform; fast algorithm design; fast algorithm implementation; hardware realisation; modulated lapped transform; perfect signal reconstruction; pipelined CPLD architecture; pipelined CPLD circuitry; pipelining techniques; post-processing; pre-processing; real-time applications; throughput;

fLanguage

English

Journal_Title

Vision, Image and Signal Processing, IEE Proceedings -

Publisher

iet

ISSN

1350-245X

Type

jour

DOI

10.1049/ip-vis:20020142

Filename

999167