DocumentCode
1280262
Title
Performance enhancement of modified turbo codes with two-stage interleavers
Author
Bhise, A. ; Vyavahare, P.D.
Author_Institution
Dept. of Electron. & Telecommun. Eng., K.J.S. Inst. of Eng. & Inf. Technol., Mumbai, India
Volume
5
Issue
10
fYear
2011
Firstpage
1336
Lastpage
1342
Abstract
Low complexity modified turbo codes (MTC) offer bit error rate performance close to Shannon´s limit with significantly reduced decoding complexity. However, since interleavers used in turbo codes interleave bit positions in one-dimensional (1D) array, they cannot be used for MTC which encode information bits arranged in 2D array. Moreover, MTC use several interleavers which increase the memory requirement to store permutation patterns. Objective of this study is to design two-stage interleaver for MTC with low memory requirement, large values of column spreading factor and dispersion in the interleaved pattern. Expressions have been derived for limits on maximum values of spreading factor and dispersion for 2D information array. Simulation results show superior performance of MTC with two-stage interleavers than that with random interleavers at high bit energy to noise ratio. Moreover, analysis shows that two-stage interleaver requires 50´ less memory storage than random interleaver. Proposed interleaver can also be used for turbo codes in which 1D information array is being used.
Keywords
communication complexity; decoding; error statistics; interleaved codes; turbo codes; 1D information array; 2D information array; Shannon limit; bit error rate performance; column spreading factor; decoding complexity reduction; low complexity modified turbo code; one-dimensional array; performance enhancement; two-stage interleaver;
fLanguage
English
Journal_Title
Communications, IET
Publisher
iet
ISSN
1751-8628
Type
jour
DOI
10.1049/iet-com.2010.0263
Filename
5960415
Link To Document